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| CTLSMS05-M622 CTLSMS12-M622 CTLSMS15-M622 CTLSMS24-M622 SURFACE MOUNT TLM SILICON QUAD TVS / ZENER ARRAY 5.0 THRU 24 VOLTS TM Central DESCRIPTION: TM Semiconductor Corp. The CENTRAL SEMICONDUCTOR CTLSMS05 Series is a 4 line TVS/Zener Array packaged in a space saving TM TM TLM (Tiny Leadless Module ) TLM622 case. These devices are designed to protect sensitive equipment against ESD and to prevent latch-up events in CMOS circuitry operating at 5V, 12V, 15V and 24V. MARKING CODES: CTLSMS05-M622: CBC CTLSMS12-M622: CBD CTLSMS15-M622: CBF CTLSMS24-M622: CBH APPLICATIONS: * PDA's * Memory Card Ports * Mobile Phones * Instrumentation Top View Bottom View TLM622 CASE FEATURES: * Very low clamping voltage * Low leakage current * 350W power dissipation * IEC61000-4-2 ESD 20kV air, 15kV contact compliance * New Tiny Leadless Module (TLM) package with a footprint compatible with the SOT-363 footprint. MAXIMUM RATINGS: (TA=25C) Peak Pulse Power (8x20sec waveform) ESD Voltage (HBM) Operating Temperature Range Storage Temperature Range ELECTRICAL CHARACTERISTICS PER DIODE: Type No. Reverse Reverse Stand-Off Breakdown Voltage Voltage SYMBOL Ppp VESD TJ Tstg 350 >25 -50 to +125 -50 to +150 UNITS W kV C C (TA=25C unless otherwise noted) Clamping Voltage 8x20sec Clamping Voltage 8x20sec Off State Marking Junction Code Capacitance VR=0V f=1.0MHz Cj MAX (pF) 200 90 70 50 CBC CBD CBF CBH Reverse Leakage Current VWRM MAX (V) CTLSMS05-M622 CTLSMS12-M622 CTLSMS15-M622 CTLSMS24-M622 5 12 15 24 VBR IBR IR MIN MAX (V) (mA) (A) 6 13.3 16.7 26.7 1.0 1.0 1.0 1.0 5.0 5.0 5.0 5.0 VR (V) 5.0 12 15 24 Vcl MAX (V) 9.5 17 22 35 Ipp (A) 5.0 5.0 5.0 5.0 Vcl MAX (V) 13 21 27 40 Ipp (A) 24 15 12 8 R1 (10-April 2006) Central TM CTLSMS05-M622 CTLSMS12-M622 CTLSMS15-M622 CTLSMS24-M622 SURFACE MOUNT TLM SILICON QUAD TVS / ZENER ARRAY 5.0 THRU 24 VOLTS TM Semiconductor Corp. TLM622 CASE - MECHANICAL OUTLINE Pinout Marking Codes: CTLSMS05-M622: CTLSMS12-M622: CTLSMS15-M622: CTLSMS24-M622: Schematic CBC CBD CBF CBH Lead Code: 1) Cathode D1 2) No Connection 3) Cathode D2 4) Cathode D3 5) No Connection 6) Cathode D4 P) Anode D1, D2, D3, D4 Suggested mounting pad layout for maximum power dissipation (Dimensions in mm) For standard mounting refer to TLM622 Package Details R1 (10-April 2006) |
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